SystemC
3.0.0
Accellera SystemC proof-of-concept library
sysc
kernel
sc_module_registry.h
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/*****************************************************************************
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Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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more contributor license agreements. See the NOTICE file distributed
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with this work for additional information regarding copyright ownership.
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Accellera licenses this file to you under the Apache License, Version 2.0
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(the "License"); you may not use this file except in compliance with the
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License. You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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implied. See the License for the specific language governing
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permissions and limitations under the License.
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*****************************************************************************/
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/*****************************************************************************
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sc_module_registry.h -- Registry for all modules.
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FOR INTERNAL USE ONLY.
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Original Author: Martin Janssen, Synopsys, Inc., 2001-05-21
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CHANGE LOG AT THE END OF THE FILE
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*****************************************************************************/
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#ifndef SC_MODULE_REGISTRY_H
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#define SC_MODULE_REGISTRY_H
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namespace
sc_core
{
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class
sc_module
;
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class
sc_simcontext
;
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// ----------------------------------------------------------------------------
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// CLASS : sc_module_registry
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//
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// Registry for all modules.
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// FOR INTERNAL USE ONLY!
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// ----------------------------------------------------------------------------
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class
sc_module_registry
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{
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friend
class
sc_simcontext
;
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public
:
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void
insert
(
sc_module
& );
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void
remove
(
sc_module
& );
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int
size
()
const
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{
return
m_module_vec.size(); }
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private
:
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// constructor
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explicit
sc_module_registry
(
sc_simcontext
& simc_ );
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// destructor
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~sc_module_registry
();
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// called when construction is done
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bool
construction_done();
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// called when elaboration is done
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void
elaboration_done();
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// called before simulation begins
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void
start_simulation();
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// called after simulation ends
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void
simulation_done();
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private
:
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int
m_construction_done;
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std::vector<sc_module*> m_module_vec;
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sc_simcontext
* m_simc;
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private
:
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// disabled
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sc_module_registry
();
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sc_module_registry
(
const
sc_module_registry
& );
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sc_module_registry
& operator = (
const
sc_module_registry
& );
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};
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}
// namespace sc_core
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#endif
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// $Log: sc_module_registry.h,v $
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// Revision 1.6 2011/08/26 20:46:10 acg
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// Andy Goodrich: moved the modification log to the end of the file to
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// eliminate source line number skew when check-ins are done.
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//
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// Revision 1.5 2011/05/09 04:07:49 acg
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// Philipp A. Hartmann:
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// (1) Restore hierarchy in all phase callbacks.
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// (2) Ensure calls to before_end_of_elaboration.
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//
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// Revision 1.4 2011/02/18 20:27:14 acg
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// Andy Goodrich: Updated Copyrights.
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//
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// Revision 1.3 2011/02/13 21:47:37 acg
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// Andy Goodrich: update copyright notice.
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//
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// Revision 1.2 2008/05/22 17:06:26 acg
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// Andy Goodrich: updated copyright notice to include 2008.
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//
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// Revision 1.1.1.1 2006/12/15 20:20:05 acg
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// SystemC 2.3
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//
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// Revision 1.3 2006/01/13 18:44:30 acg
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// Added $Log to record CVS changes into the source.
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// Taf!
sc_core
Definition:
sc_buffer.h:36
sc_core::sc_simcontext
class SC_API sc_simcontext
Definition:
sc_object.h:50
sc_core::sc_module
class SC_API sc_module
Definition:
sc_object.h:44
sc_core::sc_module
Definition:
sc_module.h:83
sc_core::sc_module_registry
Definition:
sc_module_registry.h:49
sc_core::sc_module_registry::insert
void insert(sc_module &)
sc_core::sc_module_registry::size
int size() const
Definition:
sc_module_registry.h:57
sc_core::sc_module_registry::remove
void remove(sc_module &)
sc_core::sc_simcontext
Definition:
sc_simcontext.h:164
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